
2010 Microchip Technology Inc.
Preliminary
DS41350E-page 113
PIC18F/LF1XK50
13.0
TIMER3 MODULE
The Timer3 module timer/counter incorporates these
features:
Software selectable operation as a 16-bit timer or
counter
Readable and writable 8-bit registers (TMR3H
and TMR3L)
Selectable clock source (internal or external) with
device clock or Timer1 oscillator internal options
Interrupt-on-overflow
Module Reset on CCP Special Event Trigger
A simplified block diagram of the Timer3 module is
The Timer3 module is controlled through the T3CON
information).
REGISTER 13-1:
T3CON: TIMER3 CONTROL REGISTER
R/W-0
U-0
R/W-0
RD16
—
T3CKPS1
T3CKPS0
T3CCP1
T3SYNC
TMR3CS
TMR3ON
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RD16: 16-bit Read/Write Mode Enable bit
1
= Enables register read/write of Timer3 in one 16-bit operation
0
= Enables register read/write of Timer3 in two 8-bit operations
bit 6
Unimplemented: Read as ‘0’
bit 5-4
T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 3
T3CCP1: Timer3 and Timer1 to CCP1 Enable bits
1
=
Timer3 is the clock source for compare/capture of ECCP1
0
=
Timer1 is the clock source for compare/capture of ECCP1
bit 2
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMR3CS = 1:
1
= Do not synchronize external clock input
0
= Synchronize external clock input
When TMR3CS = 0:
This bit is ignored. Timer3 uses the internal clock when TMR3CS = 0.
bit 1
TMR3CS: Timer3 Clock Source Select bit
1
= External clock input from Timer1 oscillator or T13CKI (on the rising edge after the first
falling edge)
0
= Internal clock (FOSC/4)
bit 0
TMR3ON: Timer3 On bit
1
= Enables Timer3
0
= Stops Timer3